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Today is:
February 5, 2012, 12:40 am
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FPGA Verification Engineer |
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Contact Name: - Click here to email your resume
| Education: 4 Year Degree | | Location: Ohio-Southwest
| Experience: 7 Years | | Compensation: 80,000. - 100,000. Per Year | Travel: None | | Job Type: Permanent | Relocation Covered: Yes |
Description:
Russ Hadick & Associates has partnered with a SW Ohio Company to find and qualify candidates for the FPGA Verification Engineer position. This person will create functional requirements, designs, Design capture, testbenches, and design simulation/verification.
Requirements:
Qualified candidates will have a minimum of 5 years experience in FPGA and ASIC design; preferably, 7+ years experience. The client is looking for experience in FPGA design, development and verification. Candidates should have either VHDL or Verilog experience, and be able to convert FPGA designs to ASIC’s. Excellent written and verbal communications skills are required. U.S. Citizens only, with the ability obtain DOD security clearance. Masters degree is a plus. The client prefers candidates with prior DOD/Defense experience, but will consider other. Pluses/Desirable – experience with Actel anti-fuze, Libero IDE system (schematic capture) and Mentor ModelSim tools. |
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77 W. Elmwood Drive - Suite 100, Dayton, Ohio 45459
Phone: (937) 439-7700 Fax: (937) 439-7705 |
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